The invention relates to a metal-oxide-semiconductor (MOS) capacitor suitable for operation in monolithic PN-junction isolated integrated circuit (IC) structures. The capacitor is balanced so that it can be used in the conventional differential amplifier circuits and it has low stray capacitance. As a further feature the capacitor can be used in differential input stages which are subject to electrostatic discharge (ESD) that can damage the input trasistors or any components connected thereto. It has been found that semiconductor devices are susceptible to damage from static discharges when unpowered. This can occur in testing or merely in the handling of the devices. For example, the average human body displays a typical capacitance to ground of about 120 picofarads and can easily carry a charge of 1.5 kV. The semiconductor industry has therefore developed an ESD simulation test of discharging a capacitor charged to a high voltage through pairs of IC terminals of devices that are otherwise unconnected. The devices should survive such a test without damage to show that it should survive normal handling. To quantify such testing the test capacitor is charged to an ever increasing voltage and then discharged through a resistor into the IC. The devices can then be rated for survival at specified ESD voltages.
In conventional IC structures the input transistors are the most likely to be damaged by ESD. In particular, the most common failure made is destruction of the emitter-base diode. It has been found that adding series resistors to the emitters of a differentially operated transistor input pair provides improved large signal performance such as slew rate and distortion. It has further been found that when such resistors are employed a peaking capacitor connected between the emitters will improve small signal performance. This circuit structure is exemplified in the well-known LM143/LM343 and LM144/LM344 operational amplifier families. Such peaking capacitors typically have a value of a few picofarads and should be balanced with respect to stray capacitance and to other parts of the IC. In addition to being balanced, the stray capacitance should also be as small as possible. The various requirements indicate that such a capacitor should preferrably be of the MOS variety and it should have as large a breakdown voltage as possible. While the inclusion of peaking capacitor input circuits will provide superior IC performance it tends to make the IC more prone to ESD damage. It would therefore be desirable to improve the resistance of peaking capacitors to ESD damage.